Sequential Logic Circuits
- Memory exists
- Registers
- Group of flip flops
- Holds information
- Counters
- A register that goes through a predetermined sequence of states
High speed adders
Assume that a sequential full adder takes 5 nano seconds to calculate addition. Then the next will take 10 ns. This cascading time is too huge for a sequential circuit.

gantt title Sequential Full Adder Timing dateFormat X axisFormat %s ns section Addition Process First Addition :done, 0, 5 Second Addition :done, 0, 10 Third Addition :done, 0, 15 Fourth Addition :done, 0, 20
To solve this problem we have carry look ahead adder that fetches , , , . The k map equations for carry look ahead is as follows. Here are the equations for a Carry Look-Ahead Adder (CLA):
- Generate and Propagate:
- Sum Equation:
8087 Math Co Processors
- Specially designed to do quick complex mathematical calculations
- Implemented to reduce work load on main processor
- 8087 Shares same resources as the main
- Has 60 new instructions
- all new pneumonies begin with “F”/“E” to diff from main instructions
References
Information
- date: 2025.03.11
- time: 08:35